Welcome To Parsé
Parsé Semiconductor, established in 2003, is a digital design house for ASIC, SoC and FPGA designs. During these years we have developed several products that a brief list of them comes here:
TACHRA Released
Parse has released TACHRA (Chip). This chip which uses ARISTO as it's core, offers users the ability to use this processor in their embedded system designs. For performance evaluation, Dhrystone benchmark was ran on TACHRA. Execution result shows 1400 iteration/s/MHz using our compiler.
In addition to this chip, Parsé has released a TACHRA Development Kit which can be used beside FPGA boards. This kit helps designers to test the peripherals they need for TACHRA.
Parsé Services
- High Performance High Frequency Digital Board Level Design
- Provide SoC Environments including the Proprietary Processors
- Design Outsourced ASIC/SoC and FPGA Products
ARISTO & TINY
We have prepared a SPARC based 32-bit RISC embedded processor called ARISTO, as the SoC infrastructure for further product designs. The processor is fully functional now and it is tested after fabrication in 0.18 um technology.
Meanwhile a TINY model of the same processor for FPGA/ASIC fast applications has been prepared, that may not need cache and other peripheries. TINY product is going to be integrated in a GPS single RF and Base band chipset.
Tools
A rich set of software toolsets and Development Kits has been prepared for the mentioned processors for programming and debugging purposes.
Also Parsé has developed several digital boards for application test and development kits.
Parsé Semiconductor Co. offers you to cooperate in the your projects. Our design team has the skills and experience on projects ranging from providing the SoC environment to the outsourced ASIC designs.
